Energy Efficient Analog Synapse/Neuron Circuit for Binarized Neural Networks

Energy efficiency is one of the most important factors to make deep neural networks viable in embedded systems. In this paper, we propose an analog synapse circuit using resistive random access memory (ReRAM) which operates with a switched capacitor neuron for binarized neural networks (BNNs). Thanks to the compact and energy efficient ReRAM synapses, the circuit simulation results of an MLP implemented with the proposed synapse and neuron circuits show 2.5ns classification latency and very high energy efficiency of 1536TOPS/W on 32nm technology.