Off-State Self-Heating, Micro-Hot-Spots, And Stress-Induced Device Considerations In Scaled Technologies

In this paper we show that devices in scaled technologies could undergo self-heating (SH) even in the off-state when subjected to stress conditions that would in turn adversely impact product life-time. We present a detailed methodology in analyzing the impact of off-state SH, thus preventing unintentional overstressing during product stress-screening. We propose an analytical model for modeling this effect, verifying it against detailed TCAD simulations and actual hardware (HW) data from 14nm SOI FinFET technology. We show that the amount of off-state SH depends on the actual device size and the circuit layout. Additional temperature rise (deltaT) can increase similar to 2.7x for 2-finger vs. 40-finger FETs. We demonstrate the SH impact on off-state hot-carrier-injection (HCI) induced degradation based on HW data. Finally, we analyze its impact on backend electromigration (EM) showing that median-time-to-fail (MTTF) can be reduced as much as 80% in large multi-finger (MF) FETs when off-state SH is taken into account.