Towards Hardware-Accelerated Suffix Array Construction Architecture for the De Novo DNA Sequence Assembly

It has been proven that bioinformatics applications can greatly benefit from hardware acceleration, and the de novo DNA sequence assembly is one of the most biologically significant bioinformatics problems. However, sequence assembly consists of a number of computation- and memory-intensive processing steps. This paper presents an initial approach towards an efficient hardware accelerator that will minimize the assembly time while reducing the energy footprint of the application. In particular, we present a hardware architecture, validated using an FPGA, for the suffix array construction as a first step towards a hardware-accelerated de novo DNA sequence assembler. This exploratory implementation allows us to extract information about the benefits and challenges, and provides indicative hardware utilization, memory management and I/O between the host system and the targeted FPGA.