A compact model for tunnel FET for all operation regimes including trap assisted tunneling

We present a rigorous compact model for Tunnel Field Effect Transistors (TFET) that captures all essential features including Trap Assisted Tunneling (TAT) originating from surface traps (D _it ). Inclusion of the TAT accurately captures the subthreshold behavior matching well with experimental data (Fig. 1). With self-consistent channel potential, ψ and drain injection, we show that the TFET quantum capacitance, C _q and ψ are controlled by both gate and drain biases resulting in Negative Differential Resistance (NDR) for negative drain bias (Fig 2). A Landauer-formalism-based source-drain saturation function F _sd is derived that obtains the effective tunnel energy window based on ψ and also the superlinear current depending on source degeneracy. We apply the model to an In _{0 53} Ga _{0 47} As homojunction TFET but the model is sufficiently general to use for other device structures. The model can be used to assess TFET performance in presence of different amounts of D _it .