Double gate impact ionization MOS transistor: Proposal and investigation

In this paper, a double gate impact ionization MOS (DG-IMOS) transistor with improved performance is proposed and investigated by TCAD simulation. In the proposed design, a second gate is introduced in a conventional impact ionization MOS (IMOS) transistor that lengthens the equivalent channel length and suppresses the band-to-band tunneling. The OFF-state leakage current is reduced by over four orders of magnitude. At the ON-state, the second gate is negatively biased in order to enhance the electric field in the intrinsic region. As a result, the operating voltage does not increase with the increase in the channel length. The simulation result verifies that the proposed DG-IMOS achieves a better switching characteristic than the conventional is achieved. Lastly, the application of the DG-IMOS is discussed theoretically.