Delay analysis of SWCNT bundle interconnect for different technology nodes

2016 9th International Conference on Electrical and Computer Engineering (ICECE)(2016)

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摘要
In this paper the delay occurring in SWCNT bundle interconnect is analysed based on process related parameters and it is also compared to copper wire. The circuit parameters are calculated to develop an equivalent RLC model for both SWCNT and copper considering the practical constraints. This model is used to calculate the delay for local, intermediate and global interconnects by varying the bundle density and contact resistance. The relative effect of circuit parameters is analysed for different technology nodes. This paper also points out the most important parameter affecting the performance. Similarly, the equivalent circuit model for copper interconnect is developed and the delay is determined. The comparison of copper and CNT interconnect shows that the delay for CNT can be up to 2 times more than copper in local length. The delay of CNT interconnects in 16nm, 22nm and 45nm is less than copper in intermediate range. For global interconnects, the SWCNT delay is 0.3-0.5 times less than the delay of copper wire.
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关键词
SWCNT bundle interconnect,RLC equivalent model,DIL method,Delay analysis
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