Characterization And Analysis Of Diode-String Esd Protection In 28nm Cmos By Vftlp

Cheng Li,Chenkun Wang,Qi Chen,Feilong Zhang,Fei Lu,Xuejie Shi,Yongsheng Yang,Hongwei Li,Guang Chen, Tony Li, Danniel Feng,Tianshen Tang,Yuhua Cheng,Albert Wang

2017 IEEE 24TH INTERNATIONAL SYMPOSIUM ON THE PHYSICAL AND FAILURE ANALYSIS OF INTEGRATED CIRCUITS (IPFA)（2017）

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摘要

This paper reports characterization and analysis of diode string electrostatic discharging (ESD) protection structures fabricated in a foundry 28nm CMOS technology. Comprehensive measurements were conducted using very-fast transmission line pulse (VFTLP) tester for Charged Device Model (CDM) ESD protection. The analysis results reveal the I-V insights critical to practical ESD protection designs.

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关键词

practical ESD protection designs,diode-string ESD protection,VFTLP,diode string electrostatic discharging protection structures,foundry 28nm CMOS technology,very-fast transmission line pulse tester,Charged Device Model ESD protection,CDM ESD protection,size 28.0 nm

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