Dynamic interference quantification for multicore processors

2017 IEEE/AIAA 36th Digital Avionics Systems Conference (DASC)(2017)

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摘要
An evolution from single core towards multicore processors is ongoing in order to satisfy the performance demands of future avionic applications. Furthermore, a simple migration path of legacy single core avionic applications to multicores is desired in order to save space, weight and power. However, the shared resource usage of parallel executed applications causes contention resulting in timing issues. This paper proposes a safety net approach for multicore systems executing a critical application on one core concurrently to other less critical applications on other cores. The proposal allows continuously tracking the progress of an application without any modification of the application code. Hence, interferences from other cores that thwart the critical application can be quantified at any time. In case an acceptable execution delay is exceeded, the safety net can trigger suitable countermeasures. The evaluation shows that our approach is powerful enough to reliably detect critical slowdowns from 1.8% upwards. The time required for detecting the slowdown reaches its optimum at a minimum slowdown of 3%. Hence, pathological or unacceptable slowdowns can be detected in time to trigger suitable counter measures.
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关键词
critical application,application code,critical slowdowns,acceptable execution delay,multicore systems,safety net approach,parallel executed applications,shared resource usage,future avionic applications,multicore processors,dynamic interference quantification
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