Heavy-Ion Soft Errors in Back-Biased Thin-BOX SOI SRAMs: Hundredfold Sensitivity Due to Line-Type Multicell Upsets

Silicon-on-insulator technology is often used to develop high-reliability devices with low sensitivity to single-event upsets or soft errors. Its key component, the buried-oxide (BOX) layer, is now thinned down to 10 nm. This thinning enables transistors on the layer to be efficiently conditioned by back-bias voltages fed underneath the layer. However, a little is known about the influence of such...