A comparative study of junctionless dual material double gate silicon on insulator (SOI) and silicon on nothing (SON) MOSFET

Rachana Chauhan, Abhinav,Amrish Kumar,Sanjeev Rai

2017 4th International Conference on Power, Control & Embedded Systems (ICPCES)(2017)

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摘要
In this paper, the electrostatic performance of junctionless dual material double gate (JLDMDG) silicon on insulator (SOI) is compared with that of JLDMDG silicon on nothing (SON) MOSFET. The 2D device simulation is used for the comparison of major electrostatic figure of merits such as threshold voltage (VTh), subthreshold swing, Drain Induced Barrier Lowering (DIBL) and Ion/Ioff ratio. Further, in this paper the effect of scaling and doping concentration on electrostatic performance of JLDMDG MOSFET has been studied by varying the gate oxide thickness, channel length and channel thickness. The simulation result reveals that the JLDMDG SON MOSFET provides higher immunity to different short channel effects, compared to JLDMDG SOI MOSFET. The degradation in SCEs in JLDMDG SOI is mainly due to the fringing field effect developed from gate to source/drain. The fringing field will further generate electric field into the channel region from source/drain which weaken the gate control.[9] Further, it has also been observed from the simulation results that as the JLDMDG MOSFET is scaled down to sub-nano meter regime, the short channel effects are increased.
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关键词
JLDMDG MOSFET,SOI,SON,SCEs,DIBL and subthreshold swing
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