High Performance Low Temperature Finfet With Dsper, Gate Last And Self Aligned Contact For 3d Sequential Integration

J. Micout,V. Lapras,Perrine Batude,C. Fenouillet-Beranger,J. Lacord,B. Sklenard,B. Mathieu,Quentin Rafhay,V. Mazzocchi,J.-P. Colinge, L. Lachal,X. Garros, M. Cassé,A. Toffoli,G. Romano,F. Allain,Laurent Brunet,J.-M. Hartmann, R. Bortolin,F. Mazen,Sylvain Barraud,N. Rambal,C. Tabone,M.-P. Samson,P. Besombes,V. Delaye,Z. Saghi,V. Loup,C. Comboroure, V. Balan, L. Desvoivres, C. Vizioz,G. Ghibaudo,M. Vinet

2017 IEEE INTERNATIONAL ELECTRON DEVICES MEETING (IEDM)（2017）

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摘要

For the first time, a low temperature (LT) FinFET process is demonstrated, using Solid Phase Epitaxy Regrowth (SPER), gate last integration and Self Aligned Contact (SAC). The LT devices exhibit performances close to those of the High Temperature Process Of Reference (HT POR). Several techniques of SPER doping are investigated and an innovative Double SPER (DSPER) process using two amorphization/recrystallization steps, is demonstrated. This DSPER process has the advantage of doping the bulk of the S/D junctions. This work opens the door to the fabrication of high-performance LT FinFETs for 3D sequential integration.

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关键词

High performance low temperature FinFET,self aligned contact,low temperature FinFET process,Solid Phase Epitaxy Regrowth,gate last integration,LT devices,HT POR,SPER doping,innovative Double SPER process,DSPER process,high-performance LT FinFETs,3D sequential integration,High Temperature Process of Reference,amorphization/recrystallization steps

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