13.2 A 3.6Mb 10.1Mb/mm² Embedded Non-Volatile ReRAM Macro in 22nm FinFET Technology with Adaptive Forming/Set/Reset Schemes Yielding Down to 0.5V with Sensing Time of 5ns at 0.7V

A resistive RAM (ReRAM) macro is developed as a low-cost, magnetic-disturb-immune option for embedded, non-volatile memory for SoCs used in IoT and automotive applications. We demonstrate the smallest ReRAM subarray density of 10.1Mb/mm ² in a 22nm low-power process. The subarray uses nominal-gate FINFET logic devices, with material innovations to allow low-voltage switching without impacting transistor reliability. Prior art features larger bit cell size or array density, and uses 28 or 40nm technology nodes [1]–[4]. The smallest read-sense time ($t_{\mathrm {SENSE}}\,=5$ ns@0.7V) is demonstrated, compared to previous works [2]. An optimized pulse-width (PW) voltage-current write-verify-write (PVC-WVW) sequence helps in mitigating endurance and variability. A flexible and low-area TFR (thin-film resistor) based reference scheme enables optimization of forming, write yield, retention and endurance tradeoffs by skewing different verify and read resistances. A temperature-constant current source and a reference resistance help in the precise control of the forming/set current and the verify/read operations. Compared to area-inefficient bandgap circuits and temperature sensors, the in-situ TFR was used due to its low area, flexibility and seamless integration into the SoC. The memory bank uses a single supply coming from an in-situ charge pump (CP) that is shared across the macro.