MAPIM: Mat Parallelism for High Performance Processing in Non-volatile Memory Architecture

Joonseop Sim
Joonseop Sim
Yeseong Kim
Yeseong Kim
Saransh Gupta
Saransh Gupta

20th International Symposium on Quality Electronic Design (ISQED), pp. 145-150, 2019.

Cited by: 0|Bibtex|Views34|DOI:https://doi.org/10.1109/ISQED.2019.8697441
EI WOS
Other Links: dblp.uni-trier.de|academic.microsoft.com

Abstract:

In the Internet of Things (IoT) era, data movement between processing units and memory is a critical factor in the overall system performance. Processing-in-Memory (PIM) is a promising solution to address this bandwidth bottleneck by performing a portion of computation inside the memory. Many prior studies have enabled various PIM operati...More

Code:

Data:

Your rating :
0

 

Tags
Comments