Characterization of the column-based priority logic readout of Topmetal-II− CMOS pixel direct charge sensor

M. An,W. Zhang,L. Xiao,C. Gao,C. Chen, M. Han, G. Huang, R. Ji, X. Li,J. Liu,Y. Mei, H. Pei,Q. Sun,X. Sun, K. Wang,P. Yang, W. Zhou

JOURNAL OF INSTRUMENTATION(2017)

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摘要
We present the detailed study of the digital readout of Topmetal-II- CMOS pixel direct charge sensor. Topmetal-II- is an integrated sensor with an array of 72 x 72 pixels each capable of directly collecting external charge through exposed metal electrodes in the topmost metal layer. In addition to the time-shared multiplexing readout of the analog output from Charge Sensitive Amplifiers in each pixel, hits are also generated through comparators in each pixel with individually adjustable thresholds. The hits are read out via a column-based priority logic structure, retaining both hit location and time information. The in-array column-based priority logic features with a full clock-less circuitry hence there is no continuously running clock distributed in the pixel and matrix logic. These characteristics enable its use as the charge readout device in future Time Projection Chambers without gaseous gain mechanism, which has unique advantages in low background and low rate-density experiments. We studied the detailed working behavior and performance of this readout, and demonstrated its functional validity and potential in imaging applications.
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关键词
Electronic detector readout concepts (solid-state),Front-end electronics for detector readout,Pixelated detectors and associated VLSI electronics,VLSI circuits
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