A 50 Gb/s TIA in 0.25µm SiGe:C BiCMOS in folded cascode architecture with pnp HBTs

This paper presents the design and electrical characterization of a transimpedance amplifier (TIA) implemented in a complementary 0.25 µm SiGe:C BiCMOS technology which offers a f T /f max of 110 GHz/180 GHz for the npn and 95 GHz/140 GHz for the pnp transistor, respectively. Featuring folded cascode architecture by making use of the available pnp HBTs, the amplifier exhibits a differential transimpedance gain of 52.5 dBΩ and a 3 dB bandwidth of 32 GHz with a measured differential average input referred current noise density of 13.1 pA/√Hz, dissipating 70 mW of power. Clear eye diagrams up to 50 Gb/s data rate are reported. To the best of the authors' knowledge, this is the first time pnp transistors are used at such speed, achieving an overall performance comparable to, or better than, other TIA implementations in faster technologies.