Corrections to “Interconnect Design and Benchmarking for Charge-Based Beyond-CMOS Device Proposals” [Apr 16 508-511]
IEEE Electron Device Letters, pp. 690-690, 2017.
In the above-named paper [ibid., vol. 37, no. 4, pp. 508–511, Apr. 2016], a typo was found in equation 3. The corrected equation is provided.
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