Highly Contrasting Static Charging And Bias Stress Effects In Pentacene Transistors With Polystyrene Heterostructures Incorporating Oxidizable N,N '-Bis(4-Methoxyphenyl)Aniline Side Chains As Gate Dielectrics

Charge storage and trapping properties of polymer dielectrics govern the charge densities of adjacent semiconductors and greatly influence the onoff switching voltage (threshold voltage, V-th) of organic field-effect transistors (OFETs) when the polymers are used as gate insulators. Intentional charging of polymer dielectrics in OFETs can change V-th and affect the bias stress. We describe a chemical design and fabrication protocol to construct multilayer-stack dielectrics for pentacene-based OFETs using different polystyrene (PS)-based polymers in each layer, with oxidizable N,N-bis(4-methoxyphenyl)anilino (TPAOMe)-substituted styrene copolymers in arbitrary vertical positions in the stacks. Thermal, byproduct-free cross-linking of benzocyclobutene subunits provides integrity to the multilayer structure by preventing dissolution of the previous deposited layer. Neutron reflectivity data verified the multilayer morphology. We compared the V-th shift before and after charging the stacks by application of +/- 100 V across 0.51 mu m total film thicknesses. Bias stress was the dominant effect in bilayer devices with a TPAOMe layer in contact with the pentacene, indicated by the direction of V-th shift associated with either polarity of external electric field. In structures with no TPAOMe subunit in contact with the pentacene, when charging with -100 V on top of the source and drain electrodes, electron injection from pentacene to dielectric was the major charging mechanism, again consistent with the bias stress direction. When charging with +100 V, bilayer devices without TPAOMe showed little change in V-th, suggesting there was no bias stress effect or charge injection in these devices for this charging polarity. For the bilayer devices with the TPAOMe layer in the bottom, and the trilayer devices with TPOMe in the middle, when +100 V was applied, the V-th shifts were opposite those expected from bias stress. Dipole formation or partial ionization of chargeable groups at the interface between the dielectric layers are likely polarization mechanisms in these cases. A simple analytical model supports the plausibility of these mechanisms. This work provides examples of both stabilization and shifting of V-th, and therefore controlling charge carrier density, in semiconductors overlying the dielectric multilayers.