A 40.4-Db Range, 0.73-Db Step, and 0.07-Db Error Programmable Gain Amplifier Using Gain Error Shifting Technique.

A novel gain error shifting technique suitable for the design of high resolution programmable gain amplifiers (PGAs) is presented in this brief. By cascading the hybrid-exponential approximated PGAs, the gain error in a decibel (dB)-linear characteristic is effectively reduced while the control range increases. Based on the proposed technique, a PGA with a moderate gain range and an extremely small gain step and error is developed. The PGA is implemented by using a 0.18-mu m CMOS process, occupying an area of 0.283 mm(2). Operated at a supply voltage of 1.8 V, the fabricated circuit consumes a dc power of 7.02 mW. For 56 steps in the dB-linear control, the measurement results indicate a gain range of 40.4 dB, gain step of 0.73 dB and gain error of 0.07 dB. Measured at the highest gain mode, the PGA exhibits a bandwidth from 2.6 kHz to 14 MHz and input-referred noise of 29.33 nV/root Hz, while at the lowest gain, the bandwidth is measured from 2.6 kHz to 84.5 MHz and Pin-1dB is 6.7 dBm.