Angular dependency on heavy-ion-induced single-event multiple transients (SEMT) in 65 nm twin-well and triple-well CMOS technology

The extreme reduction in minimum transistor-to-transistor spacing has resulted in multiple transistors being often affected by a single ion strike. The charge sharing becomes a prevalent phenomenon, and it usually brings about single-event multiple transients (SEMT) in combinational logic circuits. In this paper, the angular dependency of heavy-ion-induced SEMT is characterized in heavy-ion experiments. We find that angular heavy-ion incidence can induce single-event five transients in 65 nm bulk CMOS technology. Moreover, the characteristics of SEMT are different in twin-well and triple-well technology.