Pushing the Linearity Limits of a Digital Polar Transmitter

The maximum achievable linearity of a digital polar transmitter (DPTX) is mainly constrained by two RF-DAC associated nonidealities; namely, aliasing of sampling spectral replicas (SSR) of the AM and PM signals, and the presence of nonuniform quantization noise. In this work, using DPTX hardware linearization, in combination with PM SSR filtering and iterative learning control (ILC) algorithm improved by look-up tables (LUT), a CMOS DPTX is linearized close to its theoretical ACPR and EVM limits as predicted by its resolution. Using the ILC technique as underlying basis, an effective real-time direct-learning digital predistortion (DPD) technique is proposed. Measurement results show -60/-53 dBc ACPR and -60/-47 dB EVM using the ILC algorithm for 16/64 MHz OFDM signals, and -55/-48 dBc ACPR and -50/-44 dB EVM using the proposed DPD for 16/64 MHz OFDM signals. To the best of author's knowledge, this is the highest linearity reported for a DPTX operating with wideband signals.