On-Chip Thermal Balancing using Dynamic Structural Adaptation of FPGA-Based Multi-task SoPCs for Space-Borne Applications

Recent progress in CMOS and FinFET technologies have allowed the deployment of multi-task System-on-Programmable Chips (SoPCs) in a single FPGA device. In such SoPCs, tasks can execute on hard-core processors or as dedicated hardware circuits on the FPGA. These circuits, called Application Specific Processors (ASPs), can work on different clock frequencies and have different resource utilization, creating hot-spots on the die, which can cause malfunctioning of the SoPC. For SoPCs deployed on satellites, a significant thermal cycling caused by circumvolution of the satellite also influences the electronic devices in addition to dynamic on-chip thermal cycling. This paper proposes a novel method of run-time structural adaptation of the SoPC deployed on a FPGA to achieve on-chip thermal balancing. The method is based on the concept of heating or cooling the die by the active set of ASPs itself. The paper shows that, by dynamically selecting a suitable set of ASP-variants, the die temperature can be maintained in the required range in case of variations in external or on-chip temperature. This mechanism minimizes the power used for external heating/cooling systems and on-chip thermal cycling simultaneously. The proposed method is based on experimental results obtained on the Xilinx Zynq XCZ7020 device.