A Sub-fs-FoM Digital LDO Using PMOS and NMOS Arrays With Fully Integrated 7.2-pF Total Capacitance

A digital low-dropout (DLDO) regulator using p-type MOS (PMOS) and n-type MOS (NMOS) switches is proposed to achieve a sub-fs speed figure-of-merit (FoM) by reducing the total capacitance (CTOT) and accomplishing a comparable output voltage droop (ΔVOUT) during a load transition. The proposed DLDO uses the segmented PMOS switches to fully turn on the NMOS array, which strengthens the intrinsic NMO...