Implementation and Design Space Exploration of a Turbo Decoder in High-Level Synthesis

2019 International Conference on ReConFigurable Computing and FPGAs (ReConFig)(2019)

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摘要
High-Level Synthesis (HLS) allows not only for quicker prototyping, but also faster and more widespread design space exploration. In this work we designed a turbo decoder using Vivado HLS, which has not previously been explored. Our turbo decoder was designed to allow for easy design space exploration, both of algorithmic turbo decoder parameters as well as HLS parameters. Data and analysis on the design space is presented for approximately 200,000 variations with an emphasis on the needed trade-offs when designing a turbo decoder.
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关键词
high-level synthesis,design space exploration,Vivado HLS,algorithmic turbo decoder parameters,HLS parameters
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