Work-in-Progress: Offloading Cache Configuration Prediction to an FPGA for Hardware Speedup and Overhead Reduction

Ruben Vazquez
Ruben Vazquez

international conference on hardware/software codesign and system synthesis, 2019.

Cited by: 0|Bibtex|Views4|DOI:https://doi.org/10.1145/3349567.3351722
Other Links: academic.microsoft.com

Abstract:

In this paper, we present our cache configuration prediction methodology offloaded to an FPGA for improved performance and hardware overhead reduction, while maintaining cache configuration predictions within 5% of the optimal energy cache configuration for application phases for the instruction and data caches.

Code:

Data:

Your rating :
0

 

Tags
Comments