Design of Lightweight AES Algorithm Based on Masked Lookup Table

2019 IEEE 7th International Conference on Computer Science and Network Technology (ICCSNT)(2019)

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摘要
With the development of information and communication technology, block cipher algorithm represented by AES algorithm has been used more and more widely. This design optimizes the hardware implementation of AES algorithm, mainly including: using T lookup table to realize multiple operations in round unit, ameliorating the T lookup table by using fixed value masking to improve the safety, designing a structure of inner-round loop structure and completely expanded structure, and using ISE to synthesize the AES algorithm module on Virtex-6 platform. As a result of experiment, the inner-round loop structure takes up 410slices+136BRAM, and the completely expanded structure takes up 2492slices+732 BRAM. The consumption of slices increases by only 7%-10%, and can achieve 51.2Gbps throughput under 400MHz clock. Finally, the security analysis and DPA experiments show that the fixed value masking scheme in this design improved the security of AES algorithm, and can resist SODPA.
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关键词
information security,AES algorithm,fixed value masking,lookup table,FPGA
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