Imaging, Modeling and Engineering of Strain in Gate-All-Around Nanosheet Transitors
2019 IEEE International Electron Devices Meeting (IEDM)(2019)
摘要
We combine advanced transmission electron microscopy (TEM) and numerical models to draw the evolution of strains over the integration of horizontally stacked Gate-All-Around Nanosheet transistors (GAANS). In particular, we measured compressive strains of -0.5% to -1% after channel release in transistors at 10 nm design rule. With support on model calculations, we speculate that the effect is related to a compressive inter-layer dielectric (ILD). As another method to manipulate channel stresses, in a specifically designed GAANS we demonstrate a transition from compressive to tensile strain introduced by a gate stack/contact test modules. Finally, a demonstration of GAANS Si-channel cladded with SiGe opens a way for the co-integration of compressive SiGe channels with limited modification of the integration flow. The findings provide insights and guidelines for strain engineering in GAANS.
更多查看译文
关键词
compressive strains,channel release,compressive inter-layer dielectric,tensile strain,integration flow,strain engineering,TEM,numerical models,gate-all-around nanosheet transitors,compressive silicon germanium channels,GAANS silicon-channel,horizontally stacked gate-all-around nanosheet transistors,advanced transmission electron microscopy,channel stresses,contact test modules,gate stack,size 10.0 nm,SiGe,Si
AI 理解论文
溯源树
样例
生成溯源树,研究论文发展脉络
Chat Paper
正在生成论文摘要