CRAM: Collocated SRAM and DRAM with In-Memory Computing based Denoising and Filling for Neuromorphic Vision Sensors in 65 nm CMOS
IEEE Transactions on Circuits and Systems Ii-express Briefs(2020)
摘要
This brief presents an energy-efficient collocated random access memory (CRAM) featuring charge based computing. A
$9T$
bit-cell-based collocated DRAM and SRAM together with a 2-dimensional charge diffusion paths topology is used to store the input binary image data and compute locally. The computing network performs both denoising approximating a nearest-neighbor median filter for background noise and region filling for the fragmented objects. Compared to conventional in-memory computing (IMC) implementations, the proposed prototype achieves better energy efficiency and throughput without any computational burden and bandwidth overhead, due to the natural in-memory analog computations. The prototype structure fabricated in a standard 65nm CMOS technology exhibit error-free read and write operations with
$VDD$
down to
$400mV$
and frequency up to
$1GHz$
. The energy efficiency is
$233 TOPS/W$
at the normal operating frequency of
$200MHz$
and normal supply voltage of
$1.2V$
. The natural process of charge diffusion makes the process of IMC consuming
$\approx 10000 \times $
lesser energy and
$5.8 \times $
lesser area cost than conventional digital implementation in the same process node.
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关键词
Computer architecture,Microprocessors,Random access memory,Latches,Transistors,Inverters,Capacitors
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