A SiGe BiCMOS Digital Step Attenuator with Temperature and Phase Compensation for Phased Array System

A novel design of a 5-bit digital step attenuator with temperature and phase compensation over 15GHz~40GHz was proposed in this letter. A combination of different technologies including cut-off regular NFET (cNFET), capacitive and inductive low pass filers, resistors with different temperature coefficients are used to compensate the attenuation amplitude and phase variation caused by temperature changing. The proposed digital attenuator was designed, fabricated and measured over a temperature range over 180 □. The measured results show that over 15GHz~40GHz band, the RMS attenuation error is less than 1.22 dB @ 25°C,1.28dB @ −55°C, and 1.26 dB @125°C. The chip core area is less than 0.15 mm ² excluding pad area.