Design of Four Quadrant Analog Multiplier with High Robustness against PVT Variations using Genetic Algorithm

In this paper, a new current mode four-quadrant analog multiplier circuit is proposed. The circuit structure is based on dual trans-linear loops. The new structure used in the circuit shows more promising features for the purposes of lower power consumption, wider bandwidth (BW), and lower Total Harmonic Distortion (THD). The structure of the circuit is such that it is almost independent of process, temperature, and supply-voltage, PVT, variations. In addition, the circuit was optimized using Multi-Objective Genetic Algorithm (MOGA) and the results demonstrate the power of this tool in the optimization of electronic circuits. The designed circuit with 1.8 V supply voltage and 53 μW power consumption, results in 1.503 GHz BW, 0.53% THD (in 1 MHz frequency) and also 0.84% maximum nonlinearity error.