An Efficient ATPG for Crosstalk-Induced Delay Faults

For short interconnection line in logic circuits, in this paper, we propose a new test generation method for delay faults considering crosstalk-induced delay effects, based on a conventional delay ATPG technique in order to reduce the complexity of previous ATPG algorithm for crosstalk delay faults and to consider multiple aggressor crosstalk faults to maximize the noise of the victim line. In current trends in integrated circuit design, it is inevitable to eliminate errors caused by crosstalk because of stringent area and performance requirements in recent designs. These noises due to the crosstalk could be eliminated by resizing drivers, shielding interconnect techniques, rerouting signals and repeater insertion techniques. However, these redesign techniques using the analysis of the crosstalk-induced noise may be very expensive in terms of time and design efforts. In addition, since the process variation cannot be expected for all cases, these redesign techniques cannot guarantee the high noise immunity of the circuits. Therefore, automatic test pattern generation (ATPG) for crosstalk faults is an important method to verify and test that a chip can meet performance requirements [1-9]. Therefore, in this paper, we propose a new test generation method for delay faults considering crosstalk-induced delay effects, based on a conventional delay ATPG technique in order to reduce the complexity of previous ATPG algorithm for crosstalk delay faults and to consider multiple aggressor crosstalk faults to maximize the noise of the victim line. Since the proposed ATPG for crosstalk-induced delay faults uses the test patterns obtained from the conventional path delay ATPG, the proposed ATPG can reduce the search space of the backward implication of the aggressor's constraints and it is helpful for reducing the time cost of the ATPG than previous works. In addition, since the proposed technique targets on the critical path for the original delay test as the victim lines, it can improve test effectiveness of delay testing. For a sensitizable victim path, a new algorithm is proposed which appropriately activate its associated aggressor-victim pairs for maximization of crosstalk. The proposed algorithm uses the parasitic information such as coupling capacitance between a node of the victim and an aggressor and the timing information such as static timing window and the crosstalk-induced noise delay model. Using the parasitic and timing information, the proposed algorithm handles multiple aggressors coupled to a victim lying along a path and activates the aggressors in the best possible way to induce maximum crosstalk slowdown …