Error-Free Computation of Inverse Matrices in FPGA

An algorithm for computing the determinant of integer matrices based on the Givens method using rational fraction numbers is considered. The algorithm is implemented in the processor array in FPGA to calculate the inverse matrices. Due to the pipelining, and the synthesis using the resynchronization approach, the processor has a high clock frequency for the integer data with the bit width up to hundreds of bits. The processor can be used in adaptive filtering, pattern recognition, computational geometry, cryptoanalysis, etc.