Accelerator Framework of Spike-By-Spike Neural Networks for Inference and Incremental Learning in Embedded Systems

Although artificial Spiking Neural Networks provide numerous advantages versus the traditional non spiking ones, their high complexity is limiting the use to server computers or dedicated ASIC implementations. As an alternative, the recently proposed Spike-by-Spike (SbS) Neural Networks provide reduced complexity while adding noise-robustness. In this work we propose an accelerator framework for inference and incremental learning targeting resource-constrained devices. The proposed architecture automatically distributes computational tasks to multiple accelerator units. This is the first SbS neural network implementation for embedded systems. Demonstration on a Xilinx Zynq-7020 achieves 99% of accuracy on MNIST dataset classification and a 5x latency enhancement compared to a Core-i7 computer running equivalent network topologies. To facilitate the research in this domain, the entire SbS accelerator framework is available as an open-source project.