Third Quadrant Conduction Loss of 1.2–10 kV SiC MOSFETs: Impact of Gate Bias Control

The third quadrant (3rd-quad) conduction of power MOSFET s involves competing current sharing between the metal-oxide-semiconductor (MOS) channel and the body diode controlled by the gate bias ( V _G ). For 1.2 kV SiC planar MOSFET s, it is well known that a positive V _G higher than the threshold voltage enables parallel conduction through both channels, which reduces the 3rd-quad voltage drop and conduction loss. This work, for the first time, unveils that this fact does not hold for higher voltage (e.g., 3.3 kV and 10 kV) SiC planar MOSFET s. By combining the static characterization, simulation, and modeling, it is revealed that, once the MOS channel turns on , the body diode in high-voltage MOSFET s turns on at a source-to-drain voltage ( V _SD ) much higher than the built-in potential of the PN junction. In 10 kV SiC MOSFET s, the body diode does not turn on over the entire practical V _SD range if the MOS channel is on. As a result, the positive V _G leads to completely unipolar conduction, which could induce a higher voltage drop than the bipolar body diode at high temperatures. A buck converter based on a 10 kV SiC MOSFET half-bridge module was built and tested, which validated that a negative V _G control provides the smallest 3rd-quad voltage drop and conduction loss at high temperatures. Finally, based on the revealed physics for planar MOSFET s, the optimal V _G control for the 3rd-quad conduction in trench MOSFET s is discussed. These results provide critical device understandings of 1.2–10 kV SiC MOSFET s and important application guidelines for 10 kV SiC MOSFET s.