An ELT scale MCAO real-time control prototype using Xeon Phi technologies

With the next-generation of Extremely Large Telescopes (ELTs), the demands of adaptive optics real-time control (AO RTC) increase massively compared to the most complex AO systems in use today. Green Flash, an ongoing EU funded project, is investigating the optimal architecture for ELT scale AO RTC, with an emphasis on GPU and many core CPU solutions. The Intel Xeon Phi range of x86 CPUs is our current focus of investigation into CPU technologies to solve the ELT-scale AO RTC problem. Built using Intels Many Integrated Core (MIC) architecture incorporating 64 general purpose x86 CPU cores into a single CPU package paired with a large pool of on-chip high bandwidth MCDRAM, the Xeon Phi includes many of the advantages of current technologies. The current generation Xeon Phi is readily compatible with standard Linux operating systems and all of the tools and libraries, and as a standard socketed CPU it eliminates the latency introduced by the extra data transfers required for previous Xeon Phis and other accelerator devices. The Durham Adaptive Optics Real-time Controller (DARC) is a freely available, on-sky tested, fully modular, x86 CPU based AO RTC which which is ideally suited to be a basis for our investigation into ELT scale AO RTC performance. We present a proof of concept AO RTC system, in collaboration with the Green Flash project, for ELT scale MCAO, with the requirements of the MAORY AO system in mind, using an optimised DARC on Xeon Phi hardware to achieve the required performance.