Optimal Sizing of Amplifiers by Evolutionary Algorithms with Integer Encoding and g(m)/I-D Design Method

The optimal sizing of analog integrated circuits (ICs) by evolutionary algorithms (EAs) has the challenge of reducing the search spaces of the design variables, guaranteeing the proper bias conditions and providing manufacturable feasible solutions. In this manner, this chapter applies two EAs, namely the non-dominated sorting genetic algorithm (NSGA-II) and differential evolution (DE) to optimize operational amplifiers designed with complementary metal-oxide-semiconductor (CMOS) IC fabrication technology. Those EAs link the simulation program with IC emphasis (SPICE) to evaluate performances characteristics, and apply the g(m)/I-D design method to guarantee bias conditions and to reduce the search spaces for the design variables of the MOS transistors, which are associated to the width (W) and length (L) of their channels. The W/L design variables are encoded with integer values that are converted to multiples of the IC fabrication technology within SPICE. That way, integer encoding of the design variables provides manufacturable transistor sizes, while the EAs are accelerated by using chromosomes with reduced search spaces provided by the gm/ID design method. As examples, two CMOS operational transconductance amplifiers (OTAs) are sized with this optimization approach to highlight the EA's advantages when applying gm/ID design method and integer encoding.