15nm-W-FIN High-Performance Low-Defectivity Strained-Germanium pFinFETs With Low Temperature STI-Last Process

Symposium on VLSI Technology-Digest of Technical Papers(2014)

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摘要
An STI-last integration scheme was successfully developed to fabricate low-defectivity and dopant-controlled SiGe SRB /sGe Fins. For the first time, 15 nm fin-width SiGe SRB/highly-strained Ge pFinFETs are demonstrated down to 35 nm gate length. With a CETINV-normalized GM, SAT, INT of 6.7 nm.mS/mu m, the Si0.3Ge0.7 / sGe pFinFETs presented in this work improve the performance by similar to 90% as compared to the state-of-the-art relaxed-Ge FinFETs.
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关键词
Ge-Si alloys,MOSFET,germanium,isolation technology,quantum well devices,SRB,STI-last integration scheme,SiGe,fin replacement process,high-performance low-defectivity strained-germanium pFinFET,quantum well pFinFET,shallow trench isolation,size 15 nm,size 35 nm,strain relaxed buffers,
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