FPGA-based algorithms for feature extraction in the PANDA shashlyk calorimeter

PANDA is one of the four experimental pillars of the upcoming FAIR facility in Darmstadt, Germany. In PANDA, an antiproton beam with an energy between 1.5 and 15 GeV/c will interact in a hydrogen or nuclear target, allowing for studies of various aspects of non-perturbative QCD. Motivated by the high interaction rates and the diverse physics goals of the experiment, a triggerless readout approach will be employed. In this approach, each detector subsystem will be equipped with intelligent front-end electronics that independently identify signals of interest in real time. In order to detect the most forward-directed photons, electrons and positrons in PANDA, a shashlyk-type calorimeter is being constructed. This detector consists of 1512 individual cells of interleaved plastic scintillators and lead plates, and the output signals will be digitised by sampling ADCs and processed in real time by FPGAs. As part of the triggerless approach, these FPGAs will perform so-called feature extraction on the digitised signals, where the pulse-height and time of incoming pulses are extracted in real time. A substantial pile-up rate is expected, and it is foreseen that the chosen algorithm should enable reconstruction of such events. In this work we present the development of a real-time algorithm based on the well known Optimal Filter, which both improves the overall time resolution of the shashlyk detector and allows reconstruction of pile-up events with good time and energy resolution.