Design and Evaluation of a Synthesizable Standard-Cell-Based Nonvolatile FPGA

A nonvolatile FPGA, where the circuit-configuration information still remains without power supply, offers a powerful solution against the standby power issue. In this paper, a synthesizable nonvolatile FPGA is proposed, where the circuit-configuration information is described in a hardware description language and is pushed through a standard ASIC tool flow with nonvolatile logic circuit IPs such as nonvolatile flip-flops. The use of the ASIC tool flow makes it possible to migrate any arbitrary process technology and to perform architecture-level simulation with physical information. As a typical design example under 55nm CMOS/100nm magnetic tunnel junction (MTJ) technologies, the performance of the proposed nonvolatile FPGA is evaluated in comparison with that of a CMOS-only volatile FPGA.