4.8 An Area and Energy Efficient 0.12nJ/Pixel 8K 30fps AV1 Video Decoder in 5nm CMOS Process

2021 IEEE International Solid- State Circuits Conference (ISSCC)(2021)

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摘要
Major content providers such as YouTube and Netflix use AV1, a state-of-art video coding standard that was finalized in 2018. This paper presents a video processor that supports the AV1 standard via a Multi-Format video Decoder (MFD). An MFD can decode various video coding standards, such as H.264/AVC, HEVC and AV1. The video decoder can decode up to 8K Ultra HD (8K-UHD) video at 30fps at 468MHz core clock frequency. The MFD is fabricated using a state-of-the-art 5nm CMOS process with a 5,835k NAND2 equivalent gate count and 518kB SRAM. For AV1, MFD dissipates 116mW for decoding AV1 7680x4320p video at 30fps (0.12nJ/pixel) with core operating voltage at 0.7V.
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关键词
AV1 Video Decoder,state-of-art video,video processor,AV1 standard,MultiFormat video Decoder,MFD,video coding standards,8K Ultra HD,CMOS process,AV1 7680x4320p,NAND2 equivalent gate count,temperature 8.0 K,frequency 468.0 MHz,memory size 518.0 KByte,size 5.0 nm,power 116.0 mW,voltage 0.7 V
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