8.6 A Highly Reconfigurable 40-97GS/s DAC and ADC with 40GHz AFE Bandwidth and Sub-35fJ/conv-step for 400Gb/s Coherent Optical Applications in 7nm FinFET

2021 IEEE International Solid- State Circuits Conference (ISSCC)(2021)

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摘要
Low power digital signal processing (DSP) and optical integration have fueled the development of high-performance optical pluggable modules due to their deployment flexibility and network disaggregation. In addition, the rapid growth of new technologies such as 5G, cloud computing, IoT and AR/VR has prompted the demand for even higher data rates, requiring optical modules to scale beyond 400Gb/s while targeting the best possible tradeoff between power efficiency and reach. This necessitates more complex equalization schemes and coding techniques such as probabilistic shaping (PS) [1] and drives ever higher the specifications of analog building blocks. These requirements, as a result, constantly push the envelope of traditional analog-front-end (AFE) bandwidth and the rates of companion data converters such as DACs and ADCs to the technology limits, making it challenging to address a diversity of DSP modulation needs and oversampling rates while maintaining low power consumption. In this paper, we present an energy efficient optical transceiver fully integrated in a 400G coherent DSP chip using 4 reconfigurable 40-97GS/s 8b DACs and ADCs with a 40GHz AFE bandwidth, fabricated in a 7nm FinFET process.
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关键词
coherent optical applications,optical integration,high-performance optical pluggable modules,deployment flexibility,network disaggregation,cloud computing,optical modules,power efficiency,complex equalization schemes,analog building blocks,analog-front-end bandwidth,companion data converters,oversampling rates,power consumption,energy efficient optical transceiver,DSP chip,FinFET process,AFE bandwidth,DAC,DSP modulation,low power digital signal processing,current 8.6 A,size 7.0 nm,bandwidth 40.0 GHz
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