11.4 A High-Accuracy Multi-Phase Injection-Locked 8-Phase 7GHz Clock Generator in 65nm with 7b Phase Interpolators for High-Speed Data Links

The ever-increasing Internet data demand imposes stringent requirements on wireline transceiver speed, jitter, and power. A low-noise, multi-phase clock generator (MPCG) is a crucial building block in both forwarded-clock and clock-data-recovery (CDR) based clocking systems (Fig. 11.4.1). In CDR-based systems, a global phase-locked loop generates a low-noise, differential clock and distributes it to each lane, where a local phase adjuster, consisting of a multi-phase clock generator and phase interpolators (PIs), compensates the frequency and phase errors between the incoming data and quadrature clocks; while in a forwarded-clock system, the forwarded clock from the transmitter is adjusted by a delay line for phase deskew and the MPCG generates multiple phases for the ADCs. Multi-phase injection-locked ring oscillators (MPILOSCs) [1,2] provide accurate, low-noise, multi-phase clocks thanks to their wide locking range and symmetric structure, but generating the multi-phase injection signals with a poly-phase filter [1] or from a double/quadruple frequency [2] is power-hungry. Also, the circuits in [1,2] lack calibration for ROSC free-running frequency (f _osc ) variations over PVT. Two-phase (0° and 180°) IL-ROSCs with a quadrature-locked loop (OLL) are low-power, low-area MPCGs for PIs [3-5]; differential clocks are injected into the ROSC, while the OLL adjusts the ROSC biasing to suppress the IO output error, assuming that when the f _osc = f _inj , the injection frequency, the smallest IO output error and the widest ROSC noise suppression bandwidth are obtained for a given injection strength. However, simulations (Fig. 11.4.2) show that the smallest IO error occurs when f _osc is near the lower edge of the locking range due to the imbalance introduced by two-phase injection, while the optimum jitter point remains at f _osc = f _inj . As a result, when using a OLL, the injection strength has to be increased to get a sufficiently large noise suppression bandwidth. However, the stronger injection degrades the amplitude and slope balance between stages with injection, and stages without injection, which degrades the phase accuracy. In a OLL-based architecture, there is a tradeoff among IO accuracy, jitter, and power consumption.