Optimal Soft Error Mitigation In Wireless Communication Using Approximate Logic Circuits

The development of in chip manufacturing processes has enhanced energy-efficient nano-electronic and highperformance devices in daily activities. In recent times, CMOS technology scaling has recognized several transistors in large-scale VLSI chips to support performance. However, these innovations have also frequently increased the impact of Soft-Error (SE) reliability concerns in computing architectures for Wireless Communications systems. Thus, this paper proposes an energy-efficient probability-based approximation method to significantly enhance SE mitigation using approximate logic circuits. Firstly, the dynamic-based probability performance indicates that the mandatory assignment (MA) function achieves an accurate detection result of P(E) - 0.130 better than the other functions. Then, to realize a quality SE detection and overcome SEs with multiple identities which leads to wrong SE detection at the vulnerable zones, the investigation sets a detection limit at 95% and 98%, respectively. However, it is observed that the higher the detection limit, the better measurement of precision for SE that occurred. Hence, the measurement of precision with 98% of detection limit outperforms significantly as compared with other detection limits. Further, an efficient algorithm is designed to maximize system performance. The results confirm the robustness of the proposed method and a more reliable performance as compared to other existing techniques.