Towards Compositional Abstraction of Analog Neuronal Networks

This paper contributes to the automatic abstraction of analog circuits at transistor level. Specifically, this paper targets neuronal networks (NNs). As these circuits consist of millions of repeated neurons, simulation as well as verification routines are prohibitively time consuming. However, these netlists usually consist of repeated arrangement of neurons, which can be individually considered as subsystems. Starting with a neuron described as a Spice netlist, an abstraction methodology is presented that automatically generates an accurate behavioral model as a hybrid automaton (RA) in SystemC-AMS/Verilog-A while still preserving the internal voltages and currents of the subsystem. The abstracted model can replace the neuron in simulation as well as in verification routines with significant speedup factors while still achieving high accuracy.