A Method For Synchronized Harmonic Phasor Measurement Based On Hardware-Enhanced Fast Fourier Transform

Synchrophasor technology has received considerable attention in the past few years due to its unique ability to characterize the dynamics of power systems and therefore this paper proposes a low computational cost method to estimate harmonic synchronized phasors for electrical power systems monitoring. The main goal is to estimate the synchronized magnitude, phase, and frequency not only for the fundamental frequency but also for the harmonic components of the signals. Such method is simple to deploy in embedded platforms with limited computation resources and hence it is suitable for the development of low-cost phasor measurement units (PMUs), which are particularly relevant for applications in distribution systems. The proposed approach makes use of the Fast Fourier Transform along with a hardware-based scheme in order to mitigate the spectrum leakage effect. This approach consists in a dynamic sampling rate based on the estimated fundamental frequency of the power system. Several experiments were carried out with the proposed method implemented in a general-purpose hardware development platform, and include the analysis of synchronized harmonic phasor estimation, tests based on the IEEE C37.118.1 PMU standard and the recordings of real power system events. Results show significant error reductions with low computational cost, making it possible to monitor synchronized harmonics, fulfill the requirements of a class P PMU and record power systems events with similar performance to commercial PMU devices.