A 64M CMOS Image Sensor using 0.7um pixel with high FWC and switchable conversion gain

Y. Jay Jung,Vincent C. Venezia,Sangjoo Lee, Chun Yung Ai,Yibo Zhu, King W. Yeung, Geunsook Park, Woonil Choi,Zhiqiang Lin,Wu-Zang Yang,Alan Chih-Wei Hsiung,Lindsay Grant

2020 IEEE International Electron Devices Meeting (IEDM)（2020）

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摘要

This paper presents a 64 mega-pixel, backside-illuminated, CMOS image sensor using a 0.7um pixel pitch with a 7.0ke- linear full well capacity (FWC). A switchable conversion gain design was also demonstrated to have a high 18.0ke- FWC in 4-Cell pixel binning mode. Several new processes were implemented to overcome pixel performance degradation due to pixel scaling. As a result, this high FWC image sensor achieves low dark noise of 1.26e- and high quantum efficiency, comparable to larger pixel pitch products, such as 0.8um.

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关键词

CMOS image sensor,backside-illumination,switchable conversion gain design,pixel performance degradation,quantum efficiency,FWC image sensor,4-cell pixel binning mode,linear full well capacity image sensor,size 0.7 mum

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