A Time-Based Pipelined ADC Using Integrate-and-Fire Multiplying-DAC

IEEE Transactions on Circuits and Systems I: Regular Papers(2021)

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摘要
This paper presents a new time-based pipelined analog-to-digital converter (ADC) with multiplying-DAC (MDAC) stages capable of robust $2 \times $ residue amplification by subtracting two pulse widths. First, the input voltage is converted into two timing pulses containing the information of the time difference between their rising edges. Each MDAC stage performs 1.5-bit quantization and generate...
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关键词
Timing,Calibration,Time-domain analysis,Computer architecture,Threshold voltage,Microprocessors,Capacitors
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