Circuit-level evaluation of a new zero-cost transistor in an embedded non-volatile memory CMOS technology

2021 16th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS)(2021)

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摘要
This work presents a new transistor architecture developed by reusing already existing fabrication process steps in an embedded non-volatile memory (eNVM) CMOS technology. The proposed transistor is derived from an existing high-voltage transistor and is free in terms of photomasks and process steps, making it ideal for low-cost products. The new transistor is fabricated then electrically characterized, showing good analog performances. A SPICE (Simulation Program with Integrated Circuit Emphasis) model of the new device is developed to assess its circuit-level performances through electrical circuit simulation. The in-circuit performances of the new device are evaluated based on different ring oscillator circuits. A comparison with the existing high-voltage transistor is carried out considering performance parameters such as the oscillating frequency to demonstrate the appeal of our new transistor.
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关键词
transistor,MOSFET,CMOS,zero-cost,analog,ring oscillator,middle-voltage,circuit simulation
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