Pipeline Optimization using a Cost Extension of Timed Petri Nets
2021 IEEE 28th Symposium on Computer Arithmetic (ARITH)(2021)
摘要
A major step in arithmetic operators design is the placement of pipeline stages, with the goal of drastically increase the data throughput. Approaches, such as the as-soon-as-possible greedy algorithm, allow pipelining with a frequency target. They can possibly be combined with a retiming operation to reduce the number of pipeline registers. This retiming step is based on a weighted directed graph...
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关键词
pipeline optimisation,arithmetic operator,synchronous circuit,Timed Petri Net
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