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A System-Level Design Method for RF Receiver Front-End with Low Power Consumption

Analog integrated circuits and signal processing(2021)

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Abstract
Due to wireless communication’s rapid growth, the need for low power integrated transceivers is increasing. The receiver power is a major limiting factor, and the radio frequency (RF) front-end is often its significant power consuming part. Therefore, system-level design in which the overall specifications are distributed among RF front-end building blocks such that the minimum total power is consumed is crucial. A complete system-level design method for a low power RF front-end is presented in this paper. For this purpose, the performance of each block is modeled by its current and overdrive voltage. An analytical associated with a search-based optimization technique is employed to derive realizable values of current and overdrive voltage for each block while the total current is minimized. Then the corresponding distributed specifications are calculated. Some of its main advantages with respect to the state-of-the-art methods are specifying blocks’ insight information, distribution of all main RF specifications, further power reduction, and easy to test the results’ realizability. To check the proposed method’s effectiveness, the RF front-ends of a Bluetooth receiver in 0.35 μm CMOS technology, an IEEE 802.11b/g wireless LAN (WLAN) receiver in 90 nm CMOS technology, and a WLAN receiver in 65 nm CMOS technology are designed. Results indicate that the front-ends designed with the proposed method consume less power with respect to the state-of-the-art methods, which is 5%, 28%, and 66%, respectively. The system-level design for the Bluetooth receiver RF front-end is evaluated through simulation, and the (corner) simulation results are consistent with the theory.
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Key words
Block specification,Integrated receiver,Low power,Power optimization,Radio frequency (RF) front-end,System-level design
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