Design Techniques for Area-efficient Two-Stacked Current Sources in Nanometer CMOS Technology
2021 18th International SoC Design Conference (ISOCC)(2021)
摘要
Employing long-channel transistors for building current sources increases the analog circuit area because of complicated design rules associated with the use of long channel transistors, especially in advanced CMOS technologies. Therefore, stacked short-channel transistors are preferred for current source construction; however, they require proper design techniques. In this paper, we propose two-s...
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关键词
Resistance,Buildings,Analog circuits,CMOS technology,Transistors,Current density
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